/*
 * @Description: 
 * @Author: zhangwu
 * @Date: 2021-04-08 15:27:29
 * @LastEditTime: 2021-04-08 17:33:33
 * @LastEditors: zhangwu
 */

#include "led.h"

void led_init(void)
{
    unsigned int val;
    CCM_CCGR1                           = (unsigned int*)(0x20C406C); 
    IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER9  = (unsigned int*)(0x20E0040);
    IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09    = (unsigned int*)(0x20E0080);
    GPIO5_GDIR                          = (unsigned int*)(0x20AC004);
    GPIO1_GDIR                          = (unsigned int*)(0x209C004);
    GPIO5_DR                            = (unsigned int*)(0x20AC000);
    GPIO1_DR                            = (unsigned int*)(0x209C000);
    
    /* 1. set CCM enable GPIO_09 and GPIO5_09
     *    CCM_CCGR1[CG15] [CG13]  Address: 20C_4000h base + 6Ch offset = 20C_406Ch
     *    bit[31:30] = 0b11
     *    bit[27:26] = 0b11
     */
    val = *CCM_CCGR1;
    val |= (3<<30);
    val |= (3<<26);
    *CCM_CCGR1 = val;

    /* 2. set GPIO1_09 and GPIO5_09 as GPIO
     *	  set IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER9 to configure GPIO5_09 as GPIO 
     *	  set IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09 to configure GPIO1_09 as GPIO 
     *	  IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER9 Address: 20E_0000h base + 40h offset = 20E_0040h
     *	  IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09 Address: 20E_0000h base + 80h offset = 20E_0080h
     *	  bit[3:0] = 0b101 alt5
     *	  bit[3:0] = 0b101 alt5
     */
    val = *IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER9;
    val &= ~(0xf);
    val |= 5;
    *IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER9 = val;
    val = *IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09;
    val &= ~(0xf);
    val |= 5;
    *IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO09 = val;

    /* 3. set GPIO5_09 and GPIO1_09 as output pin
     * 	  set GPIO5_GDIR and GPIO1_GDIR to configure GPIO5_09 GPIO1_09 as output  
     *	  GPIO5_GDIR  0x20A_C000h + 0x4h = 0x20A_C004h
     *	  GPIO1_GDIR  0x209_C000h + 0x4h = 0x209_C004h
     *	  bit[9] = 0b1
     */
    val = *GPIO5_GDIR;
    val |= (1<<9);
    *GPIO5_GDIR = val;
    val = *GPIO1_GDIR;
    val |= (1<<9);
    *GPIO1_GDIR = val;
}

void led_ctl(int status)
{
    unsigned int val;
    if (status) {
       /*　4. set GPIO5_09 and GPIO1_09 output low level
        *	  set GPIO5_DR and GPIO1_DR to configure GPIO5_09 GPIO1_09 output 0
        *	  GPIO5_DR	0x20A_C000h + 0x0h = 0x20A_C000h
        *	  GPIO1_DR	0x209_C000h + 0x0h = 0x209_C000h
        *	  bit[9] = 0b0
        */
        #if 1
        val = *GPIO5_DR;
        val &= ~(1<<9);
        *GPIO5_DR = val;
        #endif
        val = *GPIO1_DR;
        val &= ~(1<<9);
        *GPIO1_DR = val;
    }else {
        /*	5. set GPIO5_09 and GPIO1_09 output high level
         *	   set GPIO5_DR and GPIO1_DR to configure GPIO5_09 GPIO1_09 output 1
         *	   GPIO5_DR	0x20A_C000h + 0x0h = 0x20A_C000h
         *	   GPIO1_DR	0x209_C000h + 0x0h = 0x209_C000h
         *	   bit[9] = 0b1
         */ 
        #if 1 
        val = *GPIO5_DR;
        val |= (1<<9);
        *GPIO5_DR = val;
        #endif
        
        val = *GPIO1_DR;
        val |= (1<<9);
        *GPIO1_DR = val;
    }
    


}
